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| www.fairchildsemi.com KM4200 Dual, Low Cost, +2.7V & +5V, 260MHz Rail-to-Rail Amplifier Features s s s General Description The KM4200 is a dual, low cost, voltage feedback amplifier. This amplifier is designed to operate on +2.7V, +5V, or 2.5V supplies. The input voltage range extends 300mV below the negative rail and 1.2V below the positive rail. The KM4100 (single) and KM4101 (single with disable) are also available. The KM4200 offers superior dynamic performance with a 260MHz small signal bandwidth and 145V/s slew rate. The combination of low power, high output current drive, and rail-to-rail performance make the KM4200 well suited for battery-powered communication/computing systems. The combination of low cost and high performance make the KM4200 suitable for high volume applications in both consumer and industrial applications such as wireless phones, scanners, and color copiers. s s s s s s s 260MHz bandwidth Fully specified at +2.7V and +5V supplies Output voltage range: 0.036V to 4.953V; Vs = +5; RL = 2k Input voltage range: -0.3V to +3.8V; Vs = +5 145V/s slew rate 4.2mA supply current per amplifier 55mA linear output current 85mA short circuit current Directly replaces AD8052 and AD8042 in single supply applications Small package options (SOIC and MSOP) Applications s s s s s s s s s KM4200 Packages SOIC Out1 -In1 +In1 -Vs 1 2 3 4 + Output Voltage (0.5V/div) A/D driver Active filters CCD imaging systems CD/DVD ROM Coaxial cable drivers High capacitive load driver Portable/battery-powered applications Twisted pair driver Video driver Output Swing 2.7 8 7 + +Vs Out2 -In2 +In2 Vs = +2.7V RL = 2k G = -1 0 Time (0.5s/div) 6 5 MSOP Out1 -In1 +In1 -Vs 1 2 3 4 + 8 7 + +Vs Out2 -In2 +In2 6 5 REV. 1A February 2001 DATA SHEET KM4200 KM4200 Electrical Characteristics PARAMETERS Case Temperature Frequency Domain Response -3dB bandwidth full power bandwidth gain bandwidth product Time Domain Response rise and fall time settling time to 0.1% overshoot slew rate Distortion and Noise Response 2nd harmonic distortion 3rd harmonic distortion THD input voltage noise input current noise crosstalk DC Performance input offset voltage average drift input bias current average drift input offset current power supply rejection ratio open loop gain quiescent current per amplifier Input Characteristics input resistance input capacitance input common mode voltage range common mode rejection ratio Output Characteristics output voltage swing linear output current short circuit output current power supply operating range (Vs = +2.7V, G = 2, RL = 2k to Vs/2; unless noted) TYP +25C MIN & MAX +25C MHz MHz MHz MHz ns ns % V/s dBc dBc dB nV/Hz pA/Hz dB 8 8 1 52 65 5 mV V/C A nA/C A dB dB mA M pF V dB V V V mA mA mA V 1 UNITS NOTES CONDITIONS G = +1, Vo = 0.05Vpp G = +2, Vo = 0.2Vpp G = +2, Vo = 2Vpp 0.2V step 1V step 0.2V step, 2.7V step, G = -1 1Vpp, 5MHz 1Vpp, 5MHz 1Vpp, 5MHz >1MHz >1MHz 10MHz 215 85 36 86 3.7 40 9 130 79 82 77 16 1.3 65 -1.6 10 3 7 0.1 57 75 3.9 4.3 1.8 -0.3 to 1.5 87 1 1 1 1 1 2 2 2 2 2 2 DC DC, Vcm = 0V to Vs - 1.5 RL = 10k to Vs/2 RL = 2k to Vs/2 RL = 150 to Vs/2 -40C to +85C 72 2 0.023 to 2.66 0.025 to 2.653 0.1 to 2.6 0.065 to 2.55 0.3 to 2.325 55 50 85 2.7 2.5 to 5.5 2 2 Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters. NOTES: 1) Rf = 1k was used used for optimal performance. (For G = +1, Rf = 0) 2) 100% tested at +25C. Absolute Maximum Ratings supply voltage 0 to +6V maximum junction temperature +175C storage temperature range -65C to +150C lead temperature (10 sec) +300C operating temperature range (recommended) -40C to +85C input voltage range +Vs +0.5V; -Vs -0.5V internal power dissipation see power derating curves Package Thermal Resistance Package 8 lead SOIC 8 lead MSOP JA 152C/W 206C/W 2 REV. 1A February 2001 KM4200 DATA SHEET KM4200 Electrical Characteristics Parameters Case Temperature Frequency Domain Response -3dB bandwidth full power bandwidth gain bandwidth product Time Domain Response rise and fall time settling time to 0.1% overshoot slew rate Distortion and Noise Response 2nd harmonic distortion 3rd harmonic distortion THD input voltage noise input current noise crosstalk DC Performance input offset voltage average drift input bias current average drift input offset current power supply rejection ratio open loop gain quiescent current per amplifier Input Characteristics input resistance input capacitance input common mode voltage range common mode rejection ratio Output Characteristics output voltage swing linear output current short circuit output current power supply operating range Conditions (Vs = +5V, G = 2, RL = 2k to Vs/2; unless noted) TYP +25C Min & Max +25C MHz MHz MHz MHz ns ns % V/s dBc dBc dB nV/Hz pA/Hz dB 8 8 0.8 52 68 5.2 mV V/C A nA/C A dB dB mA M pF V dB V V V mA mA mA V 1 UNITS NOTES G = +1, Vo = 0.05Vpp G = +2, Vo = 0.2Vpp G = +2, Vo = 2Vpp 0.2V step 2V step 0.2V step, 5V step, G = -1 2Vpp, 5MHz 2Vpp, 5MHz 2Vpp, 5MHz >1MHz >1MHz 10MHz 260 90 40 90 3.6 40 7 145 71 78 70 16 1.3 62 1.4 10 3 7 0.1 57 78 4.2 4.3 1.8 -0.3 to 3.8 87 1 1 1 1 1 2 2 2 2 2 2 DC DC, Vcm = 0V to Vs - 1.5 RL = 10k to Vs/2 RL = 2k to Vs/2 RL = 150 to Vs/2 -40C to +85C 72 2 0.027 to 4.97 0.036 to 4.953 0.1 to 4.9 0.12 to 4.8 0.3 to 4.625 55 50 85 5 2.5 to 5.5 2 2 Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters. NOTES: 1) Rf = 1k was used used for optimal performance. (For G = +1, Rf = 0) 2) 100% tested at +25C. REV. 1A February 2001 3 DATA SHEET KM4200 KM4200 Performance Characteristics Non-Inverting Freq. Response Vs = +5V Normalized Magnitude (2dB/div) G=1 Rf = 0 (Vs = +5V, G = 2, Rf = 2k, RL = 2k to Vs/2; unless noted) Inverting Frequency Response Vs = +5V Normalized Magnitude (1dB/div) G = -1 Rf = 2k G=2 Rf = 1k G = 10 Rf = 2k G = -10 Rf = 2k G = -5 Rf = 2k G=5 Rf = 2k G = -2 Rf = 2k 0.1 1 10 100 0.1 1 10 100 Frequency (MHz) Non-Inverting Freq. Response Vs = +2.7 Normalized Magnitude (2dB/div) Normalized Magnitude (1dB/div) G=1 Rf = 0 G=2 Rf = 1k Frequency (MHz) Inverting Frequency Response Vs = +2.7V G = -1 Rf = 2k G = 10 Rf = 2k G = -10 Rf = 2k G = -5 Rf = 2k G=5 Rf = 2k G = -2 Rf = 2k 0.1 1 10 100 0.1 1 10 100 Frequency (MHz) Frequency Response vs. CL Frequency (MHz) Large Signal Frequency Response Magnitude (1dB/div) CL = 100pF Rs = 25 CL = 50pF Rs = 33 + 1k 1k Magnitude (1dB/div) Vo = 1Vpp Vo = 2Vpp Rs CL RL CL = 20pF Rs = 20 CL = 10pF Rs = 0 0.1 1 10 100 0.1 1 10 100 Frequency (MHz) Frequency Response vs. Temperature 100 90 Frequency (MHz) Input Voltage Noise Voltage Noise (nV/Hz) 1 10 Magnitude (0.5dB/div) 80 70 60 50 40 30 20 10 0 100 1k 10k 100k 1M Frequency (MHz) Frequency (Hz) 4 REV. 1A February 2001 KM4200 DATA SHEET KM4200 Performance Characteristics 2nd & 3rd Harmonic Distortion; Vs = +5V -20 -30 Vo = 2Vpp Rf = 1k 2nd RL = 150 3rd RL = 150 (Vs = +5V, G = 2, Rf = 2k, RL = 2k to Vs/2; unless noted) 2nd & 3rd Harmonic Distortion; Vs = +2.7V -20 -30 Vo = 1Vpp Rf = 1k 3rd RL = 150 Distortion (dBc) -50 -60 -70 -80 -90 0 5 10 15 20 2nd RL = 2k 3rd RL = 2k Distortion (dBc) -40 -40 -50 -60 -70 -80 -90 0 2nd RL = 150 2nd RL = 2k 3rd RL = 2k 5 10 15 20 Frequency (MHz) 2nd Harmonic Distortion vs. Vo -20 -30 Rf = 1k 20MHz Frequency (MHz) 3rd Harmonic Distortion vs. Vo -20 Rf = 1k -30 Distortion (dBc) -50 10MHz Distortion (dBc) -40 -40 -50 -60 -70 -80 -90 20MHz -60 -70 -80 -90 0.5 1.0 1.5 2.0 2.5 5MHz 10MHz 5MHz 2MHz 2MHz 0.5 1.0 1.5 2.0 2.5 Output Amplitude (Vpp) PSRR 0 -10 -50 -20 -40 Output Amplitude (Vpp) CMRR CMRR (dB) 1k 0.01 PSRR (dB) -30 -40 -50 -60 -70 -80 -60 -70 0.1 1 10 100 -90 0.01 0.1 1.0 10 100 Frequency (MHz) Open Loop Gain & Phase vs. Frequency 80 70 0.8 0.6 Frequency (MHz) Output Current Open Loop Gain (dB) Output Voltage (V) 60 50 40 30 20 10 0 -10 -20 0.01 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -100 -50 0 50 100 Short circuit current -85mA Linear output current -55mA Phase (degrees) |Gain| 0 Phase -45 -90 -135 -180 0.1 1 10 100 Frequency (MHz) Output Current (mA) REV. 1A February 2001 5 DATA SHEET KM4200 KM4200 Performance Characteristics Small Signal Pulse Response Vs = +5V Output Voltage (0.05V/div) Rf = 1k (Vs = +5V, G = 2, Rf = 2k, RL = 2k to Vs/2; unless noted) Small Signal Pulse Response Vs = +2.7V Output Voltage (0.05V/div) Rf = 1k Time (20ns/div) Time (20ns/div) Large Signal Pulse Response Vs = +5V 2.7 Output Swing Output Voltage (0.5V/div) Output Voltage (0.5V/div) Rf = 1k Vs = +2.7V RL = 2k G = -1 0 Time (20ns/div) Time (0.5s/div) Channel Matching Vs = +5V Output Voltage (4mV/div) Rf = 1k RL = 2k G=2 Channel 1 CMIR Magnitude (0.5dB/div) Channel 2 0 0.1 1 10 100 -1 0 1 2 3 4 5 Frequency (MHz) CMIR (1V/div) 6 REV. 1A February 2001 KM4200 DATA SHEET Frequency Reponse vs. Rf G=2 RL = 2k Vs = +5V Magnitude (1dB/div) General Description The KM4200 is a single supply, general purpose, voltagefeedback amplifier fabricated on a complementary bipolar process using a patent pending topography. It features a rail-to-rail output stage and is unity gain stable. Both gain bandwidth and slew rate are insensitive to temperature. The common mode input range extends to 300mV below ground and to 1.2V below Vs. Exceeding these values will not cause phase reversal. However, if the input voltage exceeds the rails by more than 0.5V, the input ESD devices will begin to conduct. The output will stay at the rail during this overdrive condition. The design uses a Darlington output stage. The output stage is short circuit protected and offers "soft" saturation protection that improves recovery time. The typical circuit schematic is shown in Figure 1. Rf = 2k Rf = 1k 1 10 100 Frequency (MHz) Figure 2: Frequency Response vs. Rf Power Dissipation The maximum internal power dissipation allowed is directly related to the maximum junction temperature. If the maximum junction temperature exceeds 150C, some reliability degradation will occur. If the maximum junction temperature exceeds 175C for an extended time, device failure may occur. The KM4200 is short circuit protected. However, this may not guarantee that the maximum junction temperature (+150C) is not exceeded under all conditions. Follow the maximum power derating curves shown in Figure 3 to ensure proper operation. Maximum Power Dissipation Maximum Power Dissipation (W) 2.0 +Vs 6.8F + +In1 + Rg 0.01F Out1 Rf 1/2 KM4200 1.5 SOIC-8 lead 1.0 MSOP-8 lead Figure 1: Typical Configuration At non-inverting gains other than G = +1, keep Rg below 1k to minimize peaking; thus, for optimum response at a gain of +2, a feedback resistor of 1k is recommended. Figure 2 illustrates the KM4200 frequency response with both 1k and 2k feedback resistors. 0.5 0 -50 -30 -10 10 30 50 70 90 Ambient Temperature ( C) Figure 3: Power Derating Curves Overdrive Recovery For an amplifier, an overdrive condition occurs when the output and/or input ranges are exceeded. The recovery time varies based on whether the input or output is overdriven and by how much the ranges are exceeded. The KM4200 will typically recover in less than 20ns from an overdrive condition. Figure 4 shows the KM4200 in an overdriven condition. REV. 1A February 2001 7 DATA SHEET Overdrive Recovery Input RL = 2k Vin =2Vpp G=5 Rf = 1k Output KM4200 Refer to the evaluation board layouts shown in Figure 7 for more information. When evaluating only one channel, complete the following on the unused channel 1. Ground the non-inverting input 2. Short the output to the inverting input Evaluation Board Information The following evaluation boards are available to aid in the testing and layout of this device: Input Voltage (0.5V/div) Time (20ns/div) Figure 4: Overdrive Recovery Driving Capacitive Loads The Frequency Response vs. CL plot on page 4, illustrates the response of the KM4200. A small series resistance (Rs) at the output of the amplifier, illustrated in Figure 5, will improve stability and settling performance. Rs values in the Frequency Response vs. CL plot were chosen to achieve maximum bandwidth with less than 1dB of peaking. For maximum flatness, use a larger Rs. Eval Board KEB006 KEB010 Description Dual Channel, Dual Supply 8 lead SOIC Dual Channel, Dual Supply 8 lead MSOP Products KM4200IC8 KM4200IM8 Evaluation board schematics and layouts are shown in Figure 6 and Figure 7. The KEB006 evaluation board is built for dual supply operation. Follow these steps to use the board in a single supply application: 1. Short -Vs to ground 2. Use C3 and C4, if the -Vs pin of the KM4200 is not directly connected to the ground plane. + Rf Rg Rs CL RL Figure 5: Typical Topology for driving a capacitive load Layout Considerations General layout and supply bypassing play major roles in high frequency performance. Fairchild has evaluation boards to use as a guide for high frequency layout and to aid in device testing and characterization. Follow the steps below as a basis for high frequency layout: Include 6.8F and 0.01F ceramic capacitors Place the 6.8F capacitor within 0.75 inches of the power pin s Place the 0.01F capacitor within 0.1 inches of the power pin s Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance s Minimize all trace lengths to reduce series inductances s s Figure 6: Evaluation Board Schematic 8 REV. 1A February 2001 KM4200 DATA SHEET KM4200 Evaluation Board Layout Figure 7a: KEB006 (top side) Figure 7b: KEB006 (bottom side) Figure 7c: KEB010 (top side) Figure 7d: KEB010 (bottom side) REV. 1A February 2001 9 DATA SHEET KM4200 KM4200 Package Dimensions SOIC-8 D e ZD C L 7 SYMBOL A1 B C D E e H h L A ZD A2 L MIN MAX 0.10 0.25 0.36 0.46 0.19 0.25 4.80 4.98 3.81 3.99 1.27 BSC 5.80 6.20 0.25 0.50 0.41 1.27 1.52 1.72 8 0 0.53 ref 1.37 1.57 SOIC C L E H Pin No. 1 B DETAIL-A h x 45 NOTE: DETAIL-A 1. All dimensions are in millimeters. 2. Lead coplanarity should be 0 to 0.10mm (.004") max. 3. Package surface finishing: (2.1) Top: matte (charmilles #18~30). (2.2) All sides: matte (charmilles #18~30). (2.3) Bottom: smooth or matte (charmilles #18~30). 4. All dimensions excluding mold flashes and end flash from the package body shall not exceed o.152mm (.006) per side(d). A A1 A2 C e S 02 MSOP-8 t1 SYMBOL MIN A 1.10 A1 0.10 A2 0.86 D 3.00 D2 2.95 E 4.90 E1 3.00 E2 2.95 E3 0.51 E4 0.51 R 0.15 R1 0.15 t1 0.31 t2 0.41 b 0.33 b1 0.30 c 0.18 c1 0.15 01 3.0 02 12.0 03 12.0 L 0.55 L1 0.95 BSC aaa 0.10 bbb 0.08 ccc 0.25 e 0.65 BSC S 0.525 BSC MAX - 0.05 0.08 0.10 0.10 0.15 0.10 0.10 0.13 0.13 +0.15/-0.06 +0.15/-0.06 0.08 0.08 +0.07/-0.08 0.05 0.05 +0.03/-0.02 3.0 3.0 3.0 0.15 - - - - - - MSOP E/2 2X -H- R1 t2 R Gauge Plane E1 3 7 0.25mm -B- 2 03 b L1 c1 b1 Section A - A 5 L 01 E3 E4 1 2 2 4 6 ccc A B C c D2 A2 -C- Detail A Scale 40:1 Detail A E2 A b aaa A bbb M A B C -A- A A E1 E A1 D 3 4 NOTE: 1 All dimensions are in millimeters (angle in degrees), unless otherwise specified. 2 3 4 5 6 7 Datums - B - and - C - to be determined at datum plane - H - . Dimensions "D" and "E1" are to be determined at datum - H - . Dimensions "D2" and "E2" are for top package and dimensions "D" and "E1" are for bottom package. Cross sections A - A to be determined at 0.13 to 0.25mm from the leadtip. Dimension "D" and "D2" does not include mold flash, protrusion or gate burrs. Dimension "E1" and "E2" does not include interlead flash or protrusion. 10 REV. 1A February 2001 KM4200 DATA SHEET Ordering Information Model KM4200 Part Number KM4200IC8 KM4200IC8TR3 KM4200IM8 KM4200IM8TR3 Package SOIC-8 SOIC-8 MSOP-8 MSOP-8 Container Rail Reel Rail Reel Pack Qty 95 2500 50 4000 Temperature range for all parts: -40C to +85C. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICES TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com (c) 2001 Fairchild Semiconductor Corporation |
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